The invention relates to a semiconductor device comprising a semiconductor body the surface of which is provided with an insulating layer and which includes a first semiconductor region of a first conductivity type, a second semiconductor region which adjoins the first semiconductor region and which is of a second, opposite conductivity type, and a third semiconductor region of the first conductivity type, which adjoins the second semiconductor region, which semiconductor regions form, at the location of an active region, respectively, a collector region, a base region and an emitter region of a bipolar transistor, and which are provided, respectively, with a first, a second and a third connection conductor connecting, respectively, the collector region, the base region and the emitter region to respectively a first, a second and a third connection region, with at least the second and the third connection conductor extending over the insulating layer. The invention also relates to a method of manufacturing such a device.
Such a device is used, for example, as a bipolar transistor, inter alia, as an amplifier, more particularly a power amplifier.
Such a device is known from the international patent specification WO 96/03772, published on Feb. 8, 1996. In said document, a bipolar NPN transistor is shown comprising an active region in a semiconductor body, the transistor including an n-type collector region, a p-type base region and an n-type emitter region at the location of said active region. Connection conductors for the base and the emitter extend over the semiconductor body covered with an insulating layer, said connection conductors connecting these regions to a connection region for, respectively, the base and the emitter. These connection regions, as well as the active region of the transistor, are formed by mesa-shaped parts of the semiconductor body. Partly as a result thereof, the device can very suitably be used as a so-called SMD (=Surface Mounted Device).
A drawback of the known device resides in that its gain is too small sometimes, particularly at high frequencies and for amplifying high powers.
Therefore, it is an object of the invention to provide a device wherein this drawback is obviated or at least partly obviated, and which device provides a high gain, particularly in the case of comparatively high powers, also at high frequencies. A further aim is to provide a simple method of manufacturing such a device.
To achieve this, a device of the type mentioned in the opening paragraph is characterized in accordance with the invention in that the second and the third connection region are situated, viewed in projection, on the same side of the active region of the transistor, the third connection conductor is divided into two or more strip-shaped sub-conductors and the second connection conductor is divided into one or more strip-shaped further sub-conductors which are situated between the sub-conductors and form a co-planar transmission line therewith.
The invention is based, first and foremost, on the recognition that the gain of the known transistor, particularly at high powers, is limited because the contribution of the emitter conductor track to the emitter inductance is not negligibly small, particularly as a result of the relatively large distance between the active region of the transistor and the emitter contact region. By dividing the emitter conductor track into two or more sub-tracks and positioning these sub-tracks on either side of the base conductor track, a co-planar transmission line is formed, during operation of the transistor, between the active region and the emitter connection region by the emitter and the base conductor tracks. As a result, the effective emitter inductance is reduced, enabling a substantially higher gain to be achieved. Very favorable results are already achieved when the emitter conductor track is divided into two sub-tracks. If necessary, use can be advantageously made of a further division of the emitter conductor track. In that case, also the base conductor track is divided, so that a base subconductor track is present between every two emitter subconductor tracks. The invention is also based on the recognitions that a division of the emitter conductor track is not disadvantageous because the subdivisions are capable of (jointly) carrying a sufficiently high current at the appropriate dimensions for a (co-planar) transmission line. In addition, a (possible) division of the base conductor track is favorable if the device comprises a plurality of active regions. In that case, the capacitance of the base conductor track (tracks) is relatively low.
A further, very important advantage of the device in accordance with the invention resides in that the transmission line used is co-planar. By virtue thereof, the transmission line can be formed in a single metal layer, so that both the manufacture and the device itself can be very simple.
In a preferred embodiment of a device in accordance with the invention, the third connection region is situated, viewed in projection, between the active region and the second connection region. On the one hand, the entire emitter-conductor track forms part, in this case, of the transmission line. On the other hand, the order of the connection regions in this embodiment, i.e. collector, emitter, base, is compatible with the customary order of connecting in, particularly, power modules. This is an additional advantage.
In a favorable modification, the third connection region is interrupted at the location of the further sub-conductor. By virtue thereof, a low-loss transmission line can be achieved.
Another favorable embodiment is characterized in that the third connection region is divided into two or more sub-regions, and the second connection region is divided into one or more further sub-regions situated between the sub-regions. Also this embodiment enables a low-loss transmission line to be achieved. In addition, this modification is extremely compact, yielding important additional advantages, such as a low capacitance of the base-conductor track and a high packing density of transistors.
In favorable modifications, it more generally applies that the semiconductor body is interrupted at the location of the second and the third connection conductor or it is so far removed from the second and the third connection conductor that the losses of the transmission line are minimal.
In a further important embodiment, the semiconductor body is attached, by means of an adhesive layer, to an insulating substrate and comprises at least three mesa-shaped parts which comprise, respectively, the active region and the first connection region, the second connection region and the third connection region. This modification yields a transmission line having particularly low losses since the semiconductor body is interrupted at the proper locations and the insulating substrate does not give rise to an increase of the losses. In addition, the transistor is very suitable for SMD mounting.
A method of manufacturing a semiconductor device in accordance with the invention, wherein a semiconductor body is covered with an insulating layer and provided with a first semiconductor region of a first conductivity type, a second semiconductor region of a second, opposite conductivity type, which adjoins the first semiconductor region, and a third semiconductor region of the second conductivity type, which adjoins the second semiconductor region, which semiconductor regions form, at the location of an active region, respectively, a collector region, a base region and an emitter region of a bipolar transistor, and which are provided with, respectively, a first, a second and a third connection conductor with which, respectively, the collector region, the base region and the emitter region are connected to, respectively, a first, a second and a third connection region, at least the second and the third connection conductor being provided on the insulating layer, which method is characterized in that the second and the third connection region are formed, viewed in projection, on the same side of the active region of the transistor, the third connection conductor is divided into two or more strip-shaped sub-conductors and the second connection conductor is subdivided into one or more strip-shaped further sub-conductors which are provided between the sub-conductors with which a co-planar transmission line is formed. Such a method enables a device in accordance with the invention to be achieved in a very simple manner.
Preferably, the third connection region is formed, viewed in projection, between the active region and the second connection region. In an important embodiment, the semiconductor body is interrupted at the location of the second and the third connection conductor or is formed at such a distance from the second and the third connection conductor that the losses of the transmission line are minimal. In a very favorable modification, the semiconductor body is attached, after the formation of the transistor, to an insulating substrate by means of an adhesive layer, whereafter three mesa-shaped parts are formed by locally removing parts of the semiconductor body, which mesa-shaped parts comprise, respectively, the active region and the first connection region, the second connection region and the third connection region.
These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter.
In the drawings: